PIC16F877A-I/PT Microchip Technology Inc., PIC16F877A-I/PT Datasheet - Page 37

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PIC16F877A-I/PT

Manufacturer Part Number
PIC16F877A-I/PT
Description
44 PIN, 7 KB FLASH, 368 RAM, 33 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F877A-I/PT

A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
33
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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3.4
PORTD and TRISD are not implemented on the
PIC16F873 or PIC16F876.
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configureable as an input or
output.
PORTD can be configured as an 8-bit wide micropro-
cessor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL.
TABLE 3-7:
TABLE 3-8:
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
08h
88h
89h
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PORTD.
Address
2001 Microchip Technology Inc.
Name
PORTD and TRISD Registers
PORTD
TRISD
TRISE
Name
Bit#
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
PORTD FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
PORTD Data Direction Register
Bit 7
RD7
IBF
Bit 6 Bit 5
Buffer Type
RD6
OBF IBOV PSPMODE
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
RD5
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Bit 4
RD4
Input/output port pin or parallel slave port bit0.
Input/output port pin or parallel slave port bit1.
Input/output port pin or parallel slave port bit2.
Input/output port pin or parallel slave port bit3.
Input/output port pin or parallel slave port bit4.
Input/output port pin or parallel slave port bit5.
Input/output port pin or parallel slave port bit6.
Input/output port pin or parallel slave port bit7.
Bit 3
RD3
FIGURE 3-7:
PORTE Data Direction Bits
Note 1: I/O pins have protection diodes to V
Bit 2
Data
Bus
WR
TRIS
RD2
WR
Port
RD Port
RD
TRIS
Bit 1
RD1
TRIS Latch
Function
Data Latch
D
D
CK
CK
Q
Q
Bit 0
RD0
PORTD BLOCK DIAGRAM
(IN I/O PORT MODE)
PIC16F87X
Q
xxxx xxxx
1111 1111
0000 -111
Value on:
EN
Schmitt
Trigger
Input
Buffer
POR,
EN
BOR
D
DS30292C-page 35
DD
and V
uuuu uuuu
1111 1111
0000 -111
Value on
RESETS
all other
I/O pin
SS
.
(1)

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