TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 304

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TMPM370FYDFG

Manufacturer Part Number
TMPM370FYDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMPM370FYDFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
QFP(14x20)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM370FYDFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
16.3.4.1 EMG Protection Circuit
16.3.4.2 EMG Release Register (PMDnEMGREL)
circuit is activated when the EMG input becomes low. The EMG protection circuit offers an emergency
stop mechanism: when the EMG input is asserted (H → L), all six port outputs are immediately disabled
(depending on the EMGCR<EMGMD> setting) and an EMG interrupt (INTEMG) is generated.
EMGCR<EMGMD> can be set to output a control signal that sets external output ports to high impedance
in case of an emergency.
tool break occurs, external output ports can be set to high impedance through the setting of the PORTMD
register.
EMGSTA<EMGST> indicates that the EMG protection circuit is active. In this state, EMG protection can
be released by setting all the port output lines inactive (MDOUT[10:8][5:0]) and then setting
EMGCR<EMGRS> to 1.
then clear EMGCR<EMGEN> to 0. (These three instructions must be executed consecutively.) While the
EMG protection input is low, any attempt to release the EMG protection state is ignored. Before setting
EMGCR<EMGRS> to 1 to release EMG protection, make sure that EMGST<EMGI> is high.
the EMGREL register to prevent it from being inadvertently disabled.
<EMGREL>: EMG disable code
Read/Write
Read/Write
Read/Write
Read/Write
Bit Symbol
Bit Symbol
Bit Symbol
Bit Symbol
The EMG protection circuit consists of an EMG protection control unit and a port output disable unit. This
A tool break also disables all six PWM output lines depending on the EMGCR<EMGMD> setting. When a
To disable the EMG protection function, write 0x5A and 0xA5 in this order to the EMGREL register and
The EMG protection circuit can be disabled only after the specified key codes (0x5A, 0xA5) are written in
After reset
After reset
After reset
After reset
EMG protection is set through the EMG Control Register (EMGCR). A read value of 1 in
of the EMGREL register.
The EMG and OVV protection functions can be disabled by setting 5A and A5 in this order to bits 7 to 0
When disabling these functions, EMGCR<EMGEN> and OVVCR<OVVEN> must be cleared to 0.
After reset, the EMG function is enabled but EMG pin is configured as a normal port.
Therefore, as the EMG protection might be valid, release the EMG protection by the following
procedure at the initial sequence.
If the EMG protection is to be disabled, continue the following procedure.
* This register is used for both the EMG and OVV functions.
① Selects EMG function by PxFC register.
② Reads PMDnEMGSTA<EMGI> to confirm it as “1”.
③ Sets PMDnMDOUT<10:8、5:0> to ”0” to make all ports in-active (“L” output).
④ Releases EMG protection by setting PMDnEMGCR<EMGRS> to ”1”.
⑤ Writes the key codes to PMDnEMGREL. (In order of 0x5A and 0xA5)
⑥ Sets PMDnEMGCR<EMGEN> to ”0” to disable the EMG protection.
Note: Initial procedure for EMG function
R → 0
R → 0
R → 0
(PMD0:0x4005 0430, PMD1:0x4005 04B0)
31
23
15
0
0
0
7
0
-
-
-
R → 0
R → 0
R → 0
30
22
14
0
0
0
6
0
-
-
-
R → 0
R → 0
R → 0
29
21
13
0
0
0
5
0
-
-
-
TMPM370 16-20
R → 0
R → 0
R → 0
28
20
12
0
0
0
4
0
-
-
-
EMGREL
W
R → 0
R → 0
R → 0
27
19
11
0
0
0
3
0
-
-
-
R → 0
R → 0
R → 0
26
18
10
0
0
0
2
0
-
-
-
Motor control circuit
R → 0
R → 0
R → 0
25
17
0
0
9
0
1
0
-
-
-
R → 0
R → 0
R → 0
TMPM370
24
16
0
0
8
0
0
0
-
-
-

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