TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 386

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TMPM370FYDFG

Manufacturer Part Number
TMPM370FYDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMPM370FYDFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
QFP(14x20)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM370FYDFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
19.3.1.4 Timer Mode
(1) When <ZEN> = 1 (<EN0INT> = 0x0006)
(2) When <ZEN> = 0 (<EN0INT> = 0x0006)
Capture Register, EN0CNT
Capture Register, EN0CNT
Encoder Pulse, ENCLK
IEncoder Pulse, ENCLK
Internal Z_Detected
Internal Z_Detected
Soft Capture SFTCAP
Counter Clear, ENCLR
Z Edge Select, ZESEL
Z Edge Select, ZESEL
Counter Clear, ENCLR
Encoder Counter
Encoder Counter
・ When <ZEN> = 1, the Z input pin is used as an external trigger. When <ZEN> = 0, no external
・ The encoder counter always counts up. If <ZEN> = 1, the counter is cleared to 0 on the selected
・ When <ENCLR> is set to 1, causing the encoder counter to be cleared to 0.
・ Z_Detected causes the value of the encoder counter to be captured into the ENCNT register. The
・ Setting the software capture bit, <SFTCAP>, to 1 causes the value of the encoder counter to be
Rotation Direction
Rotation Direction
Interrupt, INTENC0
Interrupt, INTENC0
Encoder Input, B
Encoder Input, Z
Encoder Input, B
Encoder Input, Z
Encoder Input, A
Encoder Input, A
(÷2) TIMPLS
(÷2) TIMPLS
input is used to trigger the timer.
edge of Z (at the internal Z_Detected timing): a rising edge when <ZESEL> = 0 and a falling edge
when <ZESEL> = 1. When the encoder counter has reached 0xFFFFFF, it wraps around to 0.
captured counter value can be read out of ENCNT.
fsys
fsys
dir
dir
2
2
3
3
4
4
5
Compare Interrupt
5
Compare Interrupt
0 (ini)
0 (ini)
6
6
7
7
8
8
9
9
A
A
Capture Interrupt
CW
CW
TMPM370 19-17
B
B
C
0
D
1
A
B
E
2
3
F
10
4
31
31
32
32
33
33
34
34
B
35
35
36
36
37
0
38
1
39
2
Capture Interrupt
40
3
A
Encoder Input Circuit
41
4
CCW
CCW
Compare Interrupt
0
5
1
6
2
7
3
8
41
4
9
Compare Interrupt
TMPM370
5
A
6
B
C D
7
8

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