TMPM370FYDFG Toshiba, TMPM370FYDFG Datasheet - Page 321

• Manufacturer Part Number: TMPM370FYDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 256K FLASH, 10K RAM
• Manufacturer: Toshiba

Specifications of TMPM370FYDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: QFP(14x20)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit
• Lead Free Status / Rohs Status: Details

Note 1: Frequency of SCLK can be use up to 40MHz. Do not set ADCLK[2:0] to “000” when fc=80MHz.
Note 2: AD conversion is performed at the clock frequency selected in this register. The conversion clock frequency must be selected to
Note 3: The conversion clock must not be changed while AD conversion is in progress.
how AD conversion is started. (x=A , B : ADC unit)
0x4003_0000
0x4003_0200
0x4003_0004
0x4003_0204
Setting <DACON> to “1”, when using the ADC.
Setting <ADSS> to “1” starts AD conversion (software triggered conversion). Receiving trigger signal from
PMD or TMRB(interrupt) starts AD conversion also.
fc
ADAMOD0
ADBMOD0
FC
AD conversion is performed at the clock frequency selected in the ADC Clock Setting Register.
17.3.1 ADC Clock Setting Register (ADxCLK)
ADACLK
ADBCLK
17.3.2 Mode Setting Registers
The ADC Mode Setting Registers (ADxMOD0, ADxMOD1, ADxMOD2 and ADxMOD3) are used to select
17.3 Register Descriptions
For detail setting, please read the chapter about PMD and TMRB.
ensure the guaranteed accuracy.
÷1 ÷2 ÷4 ÷8 ÷16
000
ADxMOD0
Read/Write
Read/Write
Bit symbol
After reset
Bit symbol
After reset
Function
Function
001
010
Always read
as 0.
011
R
0
7
7
-
1XX
TSH3
Write “1001”
6
6
VADCLK[2:0]
TMPM370 17-5
TSH2
sclk_vadc
Always read as 0.
5
5
SCLK
1011
R/W
R
0
-
TSH1
4
4
TSH0
3
3
Analog/ Digital Converter
AD prescaler output (SCLK) select
000: fc (Note1) 001: fc/2
010: fc/4
1XX: fc/16
ADCLK2
2
2
DAC control
0: off
1: On
011: fc/8
ADCLK1
DACON
R/W
R/W
000
1
1
0
TMPM370
Software
0 ： Don't care
1: Start
triggered
conversion
ADCLK0
ADSS
W
0
0
0