TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 208

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

11 Serial Channel (SIO)
11.3.9
11.3.10 Transmit Control Unit
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I/O interface mode:
Asynchronous (UART) mode:
Transmit Counter
TXDCLK
The transmit counter is a 4-bit binary counter used in the asynchronous communication
(UART) mode. It is counted by SIOCLK as in the case of the receive counter and generates
a transmit clock (TXDCLK) on every 16th clock pulse.
SIOCLK
When the CPU writes data to the transmit buffer, data transmission is initiated on the
rising edge of the next TXDCLK and the transmit shift clock (TXDSFT) is also generated.
In the SCLK output mode with SC0CR <IOC> set to “0,” each bit of data in the transmit
buffer is output to the TXD0 pin on the rising edge of the shift clock output from the
SCLK0 pin.
In the SCLK input mode with SC0CR <IOC> set to “1,” each bit of data in the transmit
buffer is output to the TXD0 pin on the rising or falling edge of the input SCLK signal
according to the SC0CR <SCLKS> setting.
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Fig. 11-5 Transmit Clock Generation
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Under development
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TMPM330
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