TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 74

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

8 Exceptions
8.5
External
interrupt
pin
8.5.1
priority on interrupts and handles an interrupt request with the highest priority.
Therefore, appropriate settings must be made in the clock generator.
8.5.1.1
This chapter describes routes, sources and required settings of interrupts.
The CPU is notified of interrupt requests by the interrupt signal from each interrupt source. It sets
Interrupt requests for clearing a standby mode are notified to the CPU via the clock generator.
Interrupts
Fig. 8-1 shows an interrupt request route.
Interrupt Sources
Interrupt Route
Port
Peripheral
function
Peripheral
function
Under development
Fig. 8-1 Interrupt Route
Page62
Clock generator
Clearing
standby
mode
Interrupt request
CPU
TMPM330