TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 4
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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8
7.2
7.3
7.4
7.5
7.6
8.1
8.2
8.3
8.4
8.5
8.6
7.2.1
7.2.2
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
7.4.1
7.5.1
7.5.2
7.6.1
7.6.2
7.6.3
7.6.4
7.6.5
7.6.6
7.6.7
7.6.8
Exceptions.......................................................................................................................... 53
8.1.1
8.1.2
8.5.1
8.5.2
Registers ..................................................................................................................... 32
Clock Control.............................................................................................................. 38
Modes and Mode Transitions.................................................................................... 44
Operation Modes........................................................................................................ 45
Low Power Consumption Modes.............................................................................. 45
Overview ..................................................................................................................... 53
Reset Exceptions ....................................................................................................... 60
Non-Maskable Interrupts (NMIs) ............................................................................... 60
SysTick........................................................................................................................ 61
Interrupts..................................................................................................................... 62
Exception/Interrupt-Related Registers .................................................................... 73
Register List ........................................................................................................ 32
Detailed Description of Registers ..................................................................... 33
Clock System Block Diagram............................................................................ 38
Initial Values after Reset .................................................................................... 38
Clock Multiplication Circuit (PLL)..................................................................... 40
Warm-up Function .............................................................................................. 40
System Clock ...................................................................................................... 42
Prescaler Clock Control..................................................................................... 42
System Clock Pin Output Function .................................................................. 43
Mode Transitions ................................................................................................ 44
NORMAL Mode.................................................................................................... 45
SLOW Mode......................................................................................................... 45
IDLE Mode ........................................................................................................... 46
SLEEP Mode........................................................................................................ 46
STOP Mode.......................................................................................................... 46
Low power Consumption Mode Setting........................................................... 48
Operational State in Each Mode........................................................................ 48
Releasing the Low Power Consumption Mode ............................................... 49
Warm-up .............................................................................................................. 50
Clock Operations in Mode Transition............................................................... 51
Exception Types ................................................................................................. 53
Handling Flowchart ............................................................................................ 54
Interrupt Sources................................................................................................ 62
Interrupt Handling .............................................................................................. 66
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