PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 113
PEB2255H-V13
Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2255H-V13.pdf
(374 pages)
Specifications of PEB2255H-V13
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN
PEB2255H-V13IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
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Figure 36
A slip condition is detected when the write pointer (W) and the read pointer (R) of the
memory are nearly coincident, i.e. the read pointer is within the slip limits (S +, S –). If a
slip condition is detected, a negative slip (one frame or one half of the current buffer size
is skipped) or a positive slip (one frame or one half of the current buffer size is read out
twice) is performed at the system interface, depending on the difference between RCLK
and the current working clock of the receive backplane interface. i.e. on the position of
pointer R and W within the memory. A positive/negative slip is indicated in the interrupt
status bits ISR3.RSP and ISR3.RSN.
Figure 36
•
Table 26
Data Sheet
C. Translation Mode 0
FS/DL
gives an idea of operation of the receive elastic buffer:
1
2
3
–
The Receive Elastic Buffer as Circularly Organized Memory
Channel Translation Modes (T1/J1)
Speech Channels
S+, S-
W :
R
:
:
Frame 2 Time Slots
Write Pointer (Route Clock controlled)
Read Pointer (System Clock controlled)
Limits for Slip Detection (mode dependent)
C. Translation Mode 1
R
S-
FS/DL
1
2
3
4
113
R’
W
S+
Slip
Frame 1 Time Slots
Moment of Slip Detection
Functional Description T1/J1
ITD10952
Time Slots
FALC-LH V1.3
0
1
2
3
4
PEB 2255
2000-07
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