PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 15
PEB2255H-V13
Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2255H-V13.pdf
(374 pages)
Specifications of PEB2255H-V13
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN
PEB2255H-V13IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
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- Download datasheet (6Mb)
List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 13
Table 14
Table 15
Table 16
Table 17
Table 18
Table 19
Table 20
Table 21
Table 22
Table 23
Table 24
Table 25
Table 26
Table 27
Table 28
Table 29
Table 30
Table 31
Table 32
Table 33
Table 34
Table 35
Table 36
Table 37
Table 38
Table 39
Table 40
Table 41
Table 42
Data Sheet
Pin Definitions - Microprocessor Interface . . . . . . . . . . . . . . . . . . . . . . 25
Pin Definitions - Line Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Pin Definitions - Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Pin Definitions - System Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Pin Definitions - Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Data Bus Access (16-Bit Intel Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Data Bus Access (16-Bit Motorola Mode) . . . . . . . . . . . . . . . . . . . . . . 48
Selectable Bus and Microprocessor Interface Configuration . . . . . . . . 48
Recommended Receiver Configuration Values (E1) . . . . . . . . . . . . . 56
System Clocking (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Output Jitter (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Receive Buffer Operating Modes (E1) . . . . . . . . . . . . . . . . . . . . . . . . . 64
System Clock and Data Rates (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Time Slot Assigner (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Transmit Buffer Operating Modes (E1) . . . . . . . . . . . . . . . . . . . . . . . . 78
Example Transmitter Configuration Values (E1) . . . . . . . . . . . . . . . . . 79
Allocation of Bits 1 to 8 of Time Slot 0 (E1) . . . . . . . . . . . . . . . . . . . . . 83
Transmit Transparent Mode (Doubleframe E1) . . . . . . . . . . . . . . . . . . 84
CRC-Multiframe Structure (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Transmit Transparent Mode (CRC Multiframe E1) . . . . . . . . . . . . . . . 87
Summary of Alarm Detection and Release (E1) . . . . . . . . . . . . . . . . . 93
Recommended Receiver Configuration Values (T1/J1). . . . . . . . . . . 104
System Clocking (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Output Jitter (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Receive Buffer Operating Modes (T1/J1) . . . . . . . . . . . . . . . . . . . . . 112
Channel Translation Modes (T1/J1). . . . . . . . . . . . . . . . . . . . . . . . . . 113
System Clock and Data Rates (T1/J1). . . . . . . . . . . . . . . . . . . . . . . . 117
Time Slot Assigner (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Transmit Buffer Operating Modes (T1/J1) . . . . . . . . . . . . . . . . . . . . . 132
Example Transmitter Configuration Values (T1/J1) . . . . . . . . . . . . . . 134
Pulse Shaper Programming (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . 135
Resynchronization Timing (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
4-Frame Multiframe Structure (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . 140
12-Frame Multiframe Structure (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . 141
Extended Superframe Structure (F24, ESF; T1/J1) . . . . . . . . . . . . . . 142
72-Frame Multiframe Structure (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . 146
Summary Frame Recover/Out of Frame Conditions (T1/J1) . . . . . . . 147
Summary of Alarm Detection and Release (T1/J1) . . . . . . . . . . . . . . 148
Initial Values after Reset (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
Initialization Parameters (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Line Interface Initialization (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Framer Initialization (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
15
FALC-LH V1.3
PEB 2255
2000-07
Page
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