PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 238

IC INTERFACE LINE 80-MQFP

PEB2255H-V13

Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2255H-V13

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
Framing Error Counter (Read)
FE15…0…
Data Sheet
FECH
FECL
FE15
FE7
7
7
Framing Errors
This 16-bit counter is incremented when a FAS word has been
received with an error.
Framing errors are counted during basic frame synchronous state
only (but even if multiframe synchronous state is not reached yet).
During alarm simulation, the counter is incremented every 250 s up
to its saturation. The error counter doesn’t roll over.
Clearing and updating the counter is done according to bit
FMR1.ECM.
If this bit is reset the error counter is permanently updated in the
buffer. For correct read access of the error counter bit DEC.DFEC has
to be set. With the rising edge of this bit updating the buffer is stopped
and the error counter is reset. Bit DEC.DFEC is reset automatically
with reading the error counter high byte.
If FMR1.ECM is set every second (interrupt ISR3.SEC) the error
counter is latched and then automatically reset. The latched error
counter state should be read within the next second.
238
FALC-LH V1.3
FE0
FE8
E1 Registers
0
0
PEB 2255
2000-07
(50)
(51)

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