PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 237

• Manufacturer Part Number: PEB2255H-V13
• Description: IC INTERFACE LINE 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2255H-V13

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2255H-V13; PEB2255H-V13IN

LLBDD…
LLBAD…
RSIF…
RS13…
RS15…
Data Sheet
Line Loop Back Deactivation Signal Detected
This bit is set in case the LLB deactivate signal is detected and then
received over a period of more than 25 ms with a bit error rate less
than 1/100. The bit remains set as long as the bit error rate does not
exceed 1/100.
If framing is aligned, the timeslot 0 is not taken into account for the
error rate calculation.
Any change of this bit causes a LLBSC interrupt.
Line Loop Back Activation Signal Detected
Depending on bit LCR1.EPRM the source of this status bit changed.
LCR1.EPRM=0: This bit is set in case the LLB activate signal is
detected and then received over a period of more than 25 ms with a
bit error rate less than 1/100. The bit remains set as long as the bit
error rate does not exceed 1/100.
If framing is aligned, the timeslot 0 is not taken into account for the
error rate calculation.
Any change of this bit causes a LLBSC interrupt.
PRBS Status
LCR1.EPRM=1: The current status of the PRBS synchronizer is
indicated in this bit. It is set high if the synchronous state is reached
even in the presence of a BER 1/10. A data stream containing all
zeros with/without framing bits is also a valid pseudo random bit
sequence. The same applies to an all ones data stream.
Receive Spare Bit for International Use (FAS Word)
First bit in FAS-word. Used only in doubleframe format, otherwise
fixed to ‘1’.
Receive Spare Bit (Frame 13, CRC Multiframe)
First bit in service word of frame 13. Significant only in CRC-
multiframe format, otherwise fixed to ‘0’. This bit is updated with
beginning of every received CRC multiframe.
Receive Spare Bit (Frame 15, CRC Multiframe)
First bit in service word of frame 15. Significant only in CRC-
multiframe format, otherwise fixed to ‘0’. This bit is updated with
beginning of every received CRC multiframe.
237
FALC-LH V1.3
E1 Registers
PEB 2255
2000-07