PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 19

• Manufacturer Part Number: PCI9030-AA60BI
• Description: Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
• Manufacturer: PLX Technology

Specifications of PCI9030-AA60BI

• Package / Case: FPBGA-180
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: No RoHS Version Available

May 2002
Version 1.4
FEATURE SUMMARY
• PCI Local Bus Specification r2.2-compliant 32-bit,
• PCI Bus Power Management Interface
• PCI Local Bus Specification r2.2 Vital Product Data
• PICMG 2.1, R2.0, CompactPCI Hot Swap
• PCI Target Programmable Burst Management
• PCI Target Read Ahead mode
• PCI Target Delayed Read mode
• PCI Target Delayed Write mode
• Programmable Interrupt Generator/Controller
• Two programmable FIFOs for zero wait state
PCI 9030 Data Book Version 1.4
© 2002 PLX Technology, Inc. All rights reserved.
33 MHz Bus Target Interface Device enabling
PCI Burst Transfers up to 132 MB/s
Specification r1.1 compliant
(VPD) configuration support
Specification, Hot Swap Silicon
burst operation
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•
•
Programming Interface 0 (PI = 0)
Precharge Bias Voltage Support
Early Power Support
Local Bus
Interface
Control Logic
Controller
EEPROM
Serial
PCI 9030 Internal Block Diagram
Configuration
Control Logic
Register
Local Bus
PCI Bus
Interface
Control Logic
PCI
32-Bit, 60 MHz Local Bus
32-Bit, 33 MHz PCI Bus
Configuration
Control Logic
Register
PCI SMARTarget I/O Accelerator
Control Logic
Local
Endian
PCI Bus
• Flexible Local Bus runs up to 60 MHz
• 3.3/5V tolerant PCI and Local signaling supports
• Flexible Local Bus provides 32-bit Multiplexed
• Serial EEPROM interface
• Nine programmable General Purpose I/O (GPIOs)
• Five programmable Local Address spaces
• Four programmable independent Chip Selects
• Programmable Local Bus wait states
• Programmable Local Read prefetch mechanism
• Local Bus can run asynchronously to the PCI Bus
• Two programmable Local-to-PCI interrupts
• Endian Byte Swapping
• 3.3V Core, Low-Power CMOS in 176-pin PQFP
• Industrial Temp Range operation
Universal PCI Adapter designs
or Non-Multiplexed Protocol for 8-, 16-, or 32-bit
Peripheral and Memory devices
or 180-pin
Dynamic Data
Control Logic
Read
FIFO
Bus Width
Control Logic
Hot Swap
Write
FIFO
Non-Multiplexed
Control Logic
Multiplexed/
µ
Control
BGA
Logic
FIFO
for Adapters and Embedded Systems
CompactPCI Hot Swap Ready
PCI 9030
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