PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 42

• Manufacturer Part Number: PCI9030-AA60BI
• Description: Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
• Manufacturer: PLX Technology

Specifications of PCI9030-AA60BI

• Package / Case: FPBGA-180
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: No RoHS Version Available

Section 3
Serial EEPROM Reset and Initialization
Table 3-2. Serial EEPROM Register Load Sequence (Continued)
3-4
EEPROM
Offset
Serial
4Ah
4Ch
4Eh
5Ah
5Ch
5Eh
6Ah
6Ch
6Eh
7Ah
7Ch
7Eh
40h
42h
44h
46h
48h
50h
52h
54h
56h
58h
60h
62h
64h
66h
68h
70h
72h
74h
76h
78h
Register
Local 1Ah
Local 1Eh
Local 1Ch
Local 2Ah
Local 2Eh
Local 2Ch
Local 3Ah
Local 3Eh
Local 3Ch
Local 4Ah
Local 4Eh
Local 4Ch
Local 18h
Local 22h
Local 20h
Local 26h
Local 24h
Local 28h
Local 32h
Local 30h
Local 36h
Local 34h
Local 38h
Local 42h
Local 40h
Local 46h
Local 44h
Local 48h
Local 52h
Local 50h
Local 56h
Local 54h
Offset
MSW of Local Address Space 1 Local Base Address (Remap)
LSW of Local Address Space 1 Local Base Address (Remap)
MSW of Local Address Space 2 Local Base Address (Remap)
LSW of Local Address Space 2 Local Base Address (Remap)
MSW of Local Address Space 3 Local Base Address (Remap)
LSW of Local Address Space 3 Local Base Address (Remap)
MSW of Expansion ROM Local Base Address (Remap)
LSW of Expansion ROM Local Base Address (Remap)
MSW of Local Address Space 0 Bus Region Descriptor
LSW of Local Address Space 0 Bus Region Descriptor
MSW of Local Address Space 1 Bus Region Descriptor
LSW of Local Address Space 1 Bus Region Descriptor
MSW of Local Address Space 2 Bus Region Descriptor
LSW of Local Address Space 2 Bus Region Descriptor
MSW of Local Address Space 3 Bus Region Descriptor
LSW of Local Address Space 3 Bus Region Descriptor
MSW of Expansion ROM Bus Region Descriptor
LSW of Expansion ROM Bus Region Descriptor
MSW of Chip Select 0 Base Address
LSW of Chip Select 0 Base Address
MSW of Chip Select 1 Base Address
LSW of Chip Select 1 Base Address
MSW of Chip Select 2 Base Address
LSW of Chip Select 2 Base Address
MSW of Chip Select 3 Base Address
LSW of Chip Select 3 Base Address
Serial EEPROM Write-Protected Address Boundary
LSW of Interrupt Control/Status
MSW of PCI Target Response, Serial EEPROM, and Initialization Control
LSW of PCI Target Response, Serial EEPROM, and Initialization Control
MSW of General Purpose I/O Control
LSW of General Purpose I/O Control
Register Description
© 2002 PLX Technology, Inc. All rights reserved.
PCI 9030 Data Book Version 1.4
LAS1BA[31:16]
LAS1BA[15:0]
LAS2BA[31:16]
LAS2BA[15:0]
LAS3BA[31:16]
LAS3BA[15:0]
EROMBA[31:16]
EROMBA[15:0]
LAS0BRD[31:16]
LAS0BRD[15:0]
LAS1BRD[31:16]
LAS1BRD[15:0]
LAS2BRD[31:16]
LAS2BRD[15:0]
LAS3BRD[31:16]
LAS3BRD[15:0]
EROMBRD[31:16]
EROMBRD[15:0]
CS0BASE[31:16]
CS0BASE[15:0]
CS1BASE[31:16]
CS1BASE[15:0]
CS2BASE[31:16]
CS2BASE[15:0]
CS3BASE[31:16]
CS3BASE[15:0]
PROT_AREA[7:0]
INTCSR[15:0]
CNTRL[31:16]
CNTRL[15:0]
GPIOC[31:16]
GPIOC[15:0]
Register Bits Affected
Serial EEPROM