PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 197

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PCI9030-AA60BI

Manufacturer Part Number
PCI9030-AA60BI
Description
Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
Manufacturer
PLX Technology
Datasheets

Specifications of PCI9030-AA60BI

Package / Case
FPBGA-180
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
No RoHS Version Available

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T
Target Abort
target interface chip 1-3
TCK 11-2, 11-6, 11-18, 13-3, 13-6
TDI 11-2, 11-6, 11-18, 13-3, 13-6
TDO 11-6, 11-18, 13-3, 13-6
TEST 11-1, 11-6, 13-3, 13-6
test pins 11-6, 11-18
thermal resistance 12-1
timer, retry delay 4-4
timing diagrams
timing, strobe programmable read and write 1-1
TMS 11-2, 11-6, 11-18, 13-3, 13-6
transfer, unaligned 4-39
TRDY# 2-1, 4-4, 11-8, 13-3, 13-6
TRST# 11-2, 11-6, 11-18, 13-3, 13-6
2
U
User I/O 4-11, 6-5
V
V
vendor ID 1-4, 3-1, 3-3, 9-1, 10-4
V
V
Vital Product Data (VPD) 1-3, 1-5, 3-1, 3-6, 3-7, 9-1–
voltage, precharge bias 8-1, 8-2, 12-2
VPD
V
PCI 9030 Data Book Version 1.4
© 2002 PLX Technology, Inc. All rights reserved.
15
DD
I/O
IO
SS
2-1, 10-5
arbitration 2-6, 4-9
chip select 4-12, 4-16, 5-3–5-4
configuration initialization 3-9–3-10, 4-14–4-15
general purpose I/O 4-11, 6-5
interrupts 4-10, 6-4
PCI Target, Multiplexed mode 4-16–4-31
PCI Target, Non-Multiplexed mode 4-16–4-26, 4-32–4-45
serial EEPROM initialization 3-8, 4-13
registers 10-1, 10-2, 10-15
serial EEPROM
bus interface pins 11-7–11-8
test and debug pins 11-6
See Vital Product Data
PCI Clock timeout 4-2, 10-34
9-2, 10-1
8-1
11-4, 13-3, 13-6
accesses 10-33
values programmed with 3-2
11-2, 11-4, 13-3, 13-6
11-1, 11-4, 12-1, 12-2, 13-3, 13-6
W
wait states 2-5–2-8, 2-10, 4-1, 11-14
WAITo# 2-5, 11-3, 11-9, 13-3, 13-6
width control, SMARTarget 1-1
WR# 2-5, 10-22–10-30, 11-14, 11-17, 13-3, 13-6
write 2-1
write cycle hold 2-6, 10-22–10-30
write strobe delay 1-1, 2-6, 10-22–10-30, 11-14, 11-17
Z
zero wait states
counter 11-17
cycle control 10-4
external 4-41
generation 1-5, 4-1, 4-4, 11-12, 11-15
internal 4-1, 4-35, 10-21–10-29, 11-9
PCI Bus 2-1
programmable 1-3, 1-5
timing diagrams 4-19–4-20, 4-34–4-35, 4-41
WAITo# 11-9
zero 1-3
accesses 3-7
cycles 9-1
FIFOs 1-3, 1-5, 2-10, 4-1
flush pending 4-2
Local Bus accesses 2-10
PCI Configuration timing diagrams 3-9, 4-14
PCI memory timing diagrams 3-10, 4-15
PCI power management 7-1
PCI Power mode example 7-3
PCI Target 1-3, 1-5, 4-4, 4-8
posted memory (PMW) 1-3
random read and write 9-2
registers 10-4–10-37
serial EEPROM 3-1, 3-2, 9-2
strobe timing local bus, programmable 1-1
timing diagrams See timing diagrams 4-44
VPD 9-1–9-2
wake-up request example 7-3
1-3
to zero wait states
Target Abort
Index-11

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