LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 15

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LPC1857_53

Manufacturer Part Number
LPC1857_53
Description
The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 3.
LPC1857_53
Objective data sheet
Symbol
P2_5
P2_6
P2_7
Pin description
K14
K16
H14
x
x
x
…continued
131
137
138
[4]
[3]
[3]
I; PU -
I; PU -
I; PU I/O GPIO0[7] — General purpose digital input/output pin. ISP entry pin. If
All information provided in this document is subject to legal disclaimers.
I
I
I
I/O GPIO5[5] — General purpose digital input/output pin.
-
O
O
I/O U0_DIR — RS-485/EIA-485 output enable/direction control for
I/O EMC_A10 — External memory address line 10.
O
I/O GPIO5[6] — General purpose digital input/output pin.
I
I
O
O
I/O U3_UCLK — Serial clock input/output for USART3 in synchronous
I/O EMC_A9 — External memory address line 9.
-
-
O
-
Rev. 1 — 14 December 2011
Description
R — Function reserved.
CTIN_2 — SCT input 2. Capture input 2 of timer 0.
USB1_VBUS — Monitors the presence of USB1 bus power.
Note: This signal must be HIGH for USB reset to occur.
ADCTRIG1 — ADC trigger input 1.
R — Function reserved.
T3_MAT2 — Match output 2 of timer 3.
USB0_IND0 — USB0 port indicator LED control
output 0.
R — Function reserved.
USART0.
USB0_IND0 — USB0 port indicator LED control
output 0.
CTIN_7 — SCT input 7.
T3_CAP3 — Capture input 3 of timer 3.
EMC_BLS1 — LOW active Byte Lane select signal 1.
this pin is pulled LOW at reset, the part enters ISP mode using
USART0.
CTOUT_1 — SCT output 1. Match output 1 of timer 0.
mode.
R — Function reserved.
R — Function reserved.
T3_MAT3 — Match output 3 of timer 3.
R — Function reserved.
32-bit ARM Cortex-M3 microcontroller
LPC1857/53
© NXP B.V. 2011. All rights reserved.
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