LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 51

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LPC1857_53

Manufacturer Part Number
LPC1857_53
Description
The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
LPC1857_53
Objective data sheet
Table 3.
Symbol
PF_3
PF_4
PF_5
Pin description
E10
D10
E9
-
x
-
…continued
190
170
172
[3]
[3]
[6]
I; PU -
O;
PU
I; PU -
All information provided in this document is subject to legal disclaimers.
I
I/O SSP0_MOSI — Master Out Slave in for SSP0.
-
I/O GPIO7[18] — General purpose digital input/output pin.
-
-
-
I/O SSP1_SCK — Serial clock for SSP1.
I
O
-
-
-
O
I/O I2S0_RX_SCK — I
I/O U3_UCLK — Serial clock input/output for USART3 in synchronous
I/O SSP1_SSEL — Slave Select for SSP1.
O
I/O GPIO7[19] — General purpose digital input/output pin.
-
-
-
I
Rev. 1 — 14 December 2011
Description
R — Function reserved.
U3_RXD — Receiver input for USART3.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
GP_CLKIN — General purpose clock input to the CGU.
TRACECLK — Trace clock.
R — Function reserved.
R — Function reserved.
R — Function reserved.
I2S0_TX_MCLK — I
received by the slave. Corresponds to the signal SCK in the I
specification.
R — Function reserved.
mode.
TRACEDATA[0] — Trace data, bit 0.
R — Function reserved.
R — Function reserved.
R — Function reserved.
ADC1_4 — ADC1, input channel 4.
2
S receive clock. It is driven by the master and
2
S transmit master clock.
32-bit ARM Cortex-M3 microcontroller
LPC1857/53
© NXP B.V. 2011. All rights reserved.
2
S-bus
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