LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 17

• Manufacturer Part Number: LPC1857_53
• Description: The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC1857_53
Objective data sheet
Table 3.
Symbol
P2_12
P2_13
P3_0
Pin description
E15
C16
F13
x
x
x
…continued
153
156
161
[3]
[3]
[3]
I; PU I/O GPIO1[12] — General purpose digital input/output pin.
I; PU I/O GPIO1[13] — General purpose digital input/output pin.
I; PU I/O I2S0_RX_SCK — I
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O
-
I/O EMC_A3 — External memory address line 3.
-
-
-
I/O U2_UCLK — Serial clock input/output for USART2 in synchronous
I
-
I/O EMC_A4 — External memory address line 4.
-
-
-
I/O U2_DIR — RS-485/EIA-485 output enable/direction control for
O
I/O I2S0_TX_SCK — Transmit Clock. It is driven by the master and
O
I/O SSP0_SCK — Serial clock for SSP0.
-
-
-
Rev. 1 — 14 December 2011
Description
CTOUT_4 — SCT output 4. Match output 0 of timer 1.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
mode.
CTIN_4 — SCT input 4. Capture input 2 of timer 1.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
USART2.
received by the slave. Corresponds to the signal SCK in the I
specification.
I2S0_RX_MCLK — I
received by the slave. Corresponds to the signal SCK in the I
specification.
I2S0_TX_MCLK — I
R — Function reserved.
R — Function reserved.
R — Function reserved.
2
S receive clock. It is driven by the master and
2
2
S transmit master clock.
S receive master clock.
32-bit ARM Cortex-M3 microcontroller
LPC1857/53
© NXP B.V. 2011. All rights reserved.
2
2
S-bus
S-bus
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