LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 9

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LPC1857_53

Manufacturer Part Number
LPC1857_53
Description
The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 3.
LPC1857_53
Objective data sheet
Symbol
P1_5
P1_6
P1_7
Pin description
R5
T4
T5
x
x
x
…continued
65
67
69
[3]
[3]
[3]
I; PU I/O GPIO1[8] — General purpose digital input/output pin.
I; PU I/O GPIO1[9] — General purpose digital input/output pin.
I; PU I/O GPIO1[0] — General purpose digital input/output pin.
All information provided in this document is subject to legal disclaimers.
O
-
O
O
I/O SSP1_SSEL — Slave Select for SSP1.
-
O
I
-
O
-
O
-
I/O SD_CMD — SD/MMC command signal.
I
O
I/O EMC_D0 — External memory data line 0.
O
-
-
-
Rev. 1 — 14 December 2011
Description
CTOUT_10 — SCT output 10. Match output 2 of timer 2.
R — Function reserved.
EMC_CS0 — LOW active Chip Select 0 signal.
USB0_PWR_FAULT — Port power fault signal indicating overcurrent
condition; this signal monitors over-current on the USB bus (external
circuitry required to detect over-current condition).
R — Function reserved.
SD_POW — <tbd>.
CTIN_5 — SCT input 5. Capture input 2 of timer 2.
R — Function reserved.
EMC_WE — LOW active Write Enable signal.
R — Function reserved.
EMC_BLS0 — LOW active Byte Lane select signal 0.
R — Function reserved.
U1_DSR — Data Set Ready input for UART1.
CTOUT_13 — SCT output 13. Match output 1 of timer 3.
USB0_PPWR — VBUS drive signal (towards external charge pump or
power management unit); indicates that VBUS must be driven (active
HIGH). Add a pull-down resistor to disable the power switch at reset.
This signal has opposite polarity compared to the USB_PPWR used on
other NXP LPC parts.
R — Function reserved.
R — Function reserved.
R — Function reserved.
32-bit ARM Cortex-M3 microcontroller
LPC1857/53
© NXP B.V. 2011. All rights reserved.
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