LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 33
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
LPC1857_53
Manufacturer Part Number
LPC1857_53
Description
The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1853FBD208.pdf
(131 pages)
- Current page: 33 of 131
- Download datasheet (2Mb)
NXP Semiconductors
Table 3.
LPC1857_53
Objective data sheet
Symbol
P8_7
P8_8
P9_0
P9_1
Pin description
K1
L1
T1
N6
x
x
x
x
…continued
59
66
45
49
[3]
[3]
[3]
[3]
I; PU I/O GPIO4[7] — General purpose digital input/output pin.
I; PU -
I; PU I/O GPIO4[12] — General purpose digital input/output pin.
I; PU I/O GPIO4[13] — General purpose digital input/output pin.
All information provided in this document is subject to legal disclaimers.
O
-
O
O
-
-
I
I
-
-
-
-
O
O
O
-
-
-
I
-
I/O SSP0_SSEL — Slave Select for SSP0.
O
-
-
I/O I2S0_TX_WS — Transmit Word Select. It is driven by the master and
I
-
I/O SSP0_MISO — Master In Slave Out for SSP0.
Rev. 1 — 14 December 2011
Description
USB1_ULPI_STP — ULPI link STP signal. Asserted to end or interrupt
transfers to the PHY.
R — Function reserved.
LCD_VD4 — LCD data.
LCD_PWR — LCD panel power enable.
R — Function reserved.
R — Function reserved.
T0_CAP3 — Capture input 3 of timer 0.
R — Function reserved.
USB1_ULPI_CLK — ULPI link CLK signal. 60 MHz clock generated by
the PHY.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
CGU_OUT0 — CGU spare clock output 0.
I2S1_TX_MCLK — I
MCABORT — Motor control PWM, LOW-active fast abort.
R — Function reserved.
R — Function reserved.
R — Function reserved.
ENET_CRS — Ethernet Carrier Sense (MII interface).
R — Function reserved.
MCOA2 — Motor control PWM channel 2, output A.
R — Function reserved.
R — Function reserved.
received by the slave. Corresponds to the signal WS in the I
specification.
ENET_RX_ER — Ethernet receive error (MII interface).
R — Function reserved.
2
S1 transmit master clock.
32-bit ARM Cortex-M3 microcontroller
LPC1857/53
© NXP B.V. 2011. All rights reserved.
2
S-bus
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