LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 57

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LPC1857_53

Manufacturer Part Number
LPC1857_53
Description
The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 3.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
LPC1857_53
Objective data sheet
Symbol
VPP
VDDIO
VSS
VSSIO
VSSA
x = available; - = not pinned out.
I = input, O = output, IA = inactive; PU = pull-up enabled (weak pull-up resistor pulls up pin to V
the pin state at reset without boot code operation.
5 V tolerant pad with 15 ns glitch filter; provides digital I/O functions with TTL levels and hysteresis; normal drive strength.
5 V tolerant pad with 15 ns glitch filter providing digital I/O functions with TTL levels, and hysteresis; high drive strength.
5 V tolerant pad with 15 ns glitch filter providing high-speed digital I/O functions with TTL levels and hysteresis.
5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input or output. When configured as a ADC
input or DAC output, the pin is not 5 V tolerant. For analog functionality, disable the digital section of the pad by setting the pin to an
input function and by disabling the pull-up resistor through the corresponding SFSP register.
5 V tolerant transparent analog pad.
For maximum load C
VBUS = 0.2 V when it is no longer driven.
Pin description
E8
D7,
E12,
F7,
F8,
G10,
H10,
J6,
J7,
K7,
L9,
L10,
N7,
N13
G9,
H7,
J10,
J11,
K8
C4,
D13,
G6,
G7,
G8,
H8,
H9,
J8,
J9,
K9,
K10,
M13,
P7,
P13
B2
L
= 6.5 F and maximum resistance R
x
x
x
x
x
…continued
196
x
6,
52,
57,
102
,
110
,
155
,
160
,
202
-
5,
56,
109
,
157
[13]
[13]
[14]
[14]
-
-
-
-
-
All information provided in this document is subject to legal disclaimers.
-
-
-
-
-
Rev. 1 — 14 December 2011
Description
OTP programming voltage.
I/O power supply.
Ground.
Ground.
Analog ground.
pd
= 100 k, the VBUS signal takes about 2 s to fall from VBUS = 5 V to
32-bit ARM Cortex-M3 microcontroller
DD(IO)
); F = floating. Reset state reflects
LPC1857/53
© NXP B.V. 2011. All rights reserved.
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