LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 67

• Manufacturer Part Number: LPC1857_53
• Description: The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC1857_53
Objective data sheet
7.15.1.1 Features
7.15.1 State Configurable Timer (SCT) subsystem
7.15 AHB peripherals
The SCT allows a wide variety of timing, counting, output modulation, and input capture
operations. The inputs and outputs of the SCT are shared with the capture and match
inputs/outputs of the 32-bit general purpose counter/timers.
The SCT can be configured as two 16-bit counters or a unified 32-bit counter. In the
two-counter case, in addition to the counter value the following operational elements are
independent for each half:
In the two-counter case, the following operational elements are global to the SCT, but the
last three can use match conditions from either counter:
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Up to eight GPIO pins can be selected from all GPIO pins to create an edge- or
level-sensitive GPIO interrupt request.
Any combination of pin or pins in each port can trigger one of two GPIO group
interrupts.
State variable
Limit, halt, stop, and start conditions
Values of Match/Capture registers, plus reload or capture control values
Clock selection
Inputs
Events
Outputs
Interrupts
Two 16-bit counters or one 32-bit counter.
Counters clocked by bus clock or selected input.
Counters can be configured as up counters or up-down counters.
State variable allows sequencing across multiple counter cycles.
Event combines input or output condition and/or counter match in a specified state.
Events control outputs and interrupts.
Selected events can limit, halt, start, or stop a counter.
Supports:
– up to 8 inputs
– up to 16 outputs
– 16 match/capture registers
– 16 events
– 32 states
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 14 December 2011
32-bit ARM Cortex-M3 microcontroller
LPC1857/53
© NXP B.V. 2011. All rights reserved.
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