HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 109

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HFC-S2M

Manufacturer Part Number
HFC-S2M
Description
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer
Cologne Chip AG
Datasheet
FIFO Sequence Mode is selected with V_FSM_MD = ’1’ in the register R_FIFO_MD).
CSM and FSM should be used at the same time. Actually, this is necessary for nearly all FSM
applications. The HFC-E1 works in Simple Mode if none of these two modes is selected.
FIFO sequence
To achieve a FIFO data rate higher than 8 kByte/s a FIFO must be connected to more than one
HFC-channel. As there is only one register A_CHANNEL[FIFO] the FSM programming
path must differ from the previous modes.
In FSM all FIFOs are organized in a list with up to 64 entries. Every list entry is assigned
to a FIFO. FIFO configuration can be set up as usual. I.e. HFC-channel allocation, flow
controller programming and subchannel processing can be configured as described in the
previous sections. Additionally, each list entry specifies the next FIFO of the sequence. The
list is terminated by an ‘end of list’ entry. This procedure is shown in Figure 3.9 with
list entries.
A quite simple FSM configuration with every FIFO and every HFC-channel specified only
one time in the list, would have the same data transmission result as the CSM with an equiv-
alent FIFO
connected to
The complete list is processed every 125 s with ascending list index beginning with 0.
Suppose the transmit FIFO
transferred to the first connected HFC-channel, the second byte of FIFO
connected HFC-channel and so on. This is similar to the receive data direction. The first
byte written into FIFO
from the second connected HFC-channel and so on.
March 2003 (rev. A)
HFC-E1
G
FIFO data rates higher than 8 kByte/s require an arbitrary assignment be-
tween a FIFO number and the connected HFC-channel. Therefore, the
Channel Select Mode must be enabled. For this reason FSM is mostly se-
lected in combination with CSM. All data transfer configuration possible
with FSM but without CSM are also possible with CSM only – but with
lower configuration effort!
Ò
Important !
different HFC-channels, the FIFO data rate is
FIFO
HFC-channel setup. But if a specific FIFO is selected
assigner
assigner
channel
channel
Ñ
comes from the first connected HFC-channel, the second byte
Ñ
Figure 3.8: FIFO / channel assigner
occurs several times in the list. Then the first FIFO byte is
Channel
Data Sheet
Data flow
FIFO
Ò
assigner
assigner
channel
channel
¡
ÝØ ×
Ò
Channels
times in the list and
.
Ñ
to the second
Cologne
Chip
109 of 272
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