HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 155
HFC-S2M
Manufacturer Part Number
HFC-S2M
Description
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer
Cologne Chip AG
Datasheet
1.HFC-S2M.pdf
(272 pages)
- Current page: 155 of 272
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5.4 Register description
5.4.1 Write only register
March 2003 (rev. A)
HFC-E1
R_E1_WR_STA
E1 state machine register
This register is used to set a new state. The current state can be read from the
R_STATE register.
2..0
3
4
7..5
R_LOS0
Alarm set value for loss of input signal
7..0
Bits
Bits
0
1
0
Value
Value
Reset
Reset
V_E1_SET_STA
(reserved)
V_LOS0
Name
(reserved)
V_E1_LD_STA
Name
(write only)
(write only)
E1 interface
Data Sheet
Description
Binary value of new state
(LT: Gx, TE: Fx)
V_E1_LD_STA must also be set to load the state.
Must be ’0’.
Load the new state
’0’ = enable the state machine
’1’ = load the prepared state (V_E1_SET_STA)
and stops the state machine
Note: After writing an invalid state the state
machine goes to deactivated state.
Must be ’000’.
Description
LOS alarm
LOS alarm will be active if the incoming data
stream has no transitions in (V_LOS0 ·½ ) ¡½
consecutive data bit times. Maximum time is
¾
¡ ½ ¡
Ò×
¾ Ñ× .
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