HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 138

no-image

HFC-S2M

Manufacturer Part Number
HFC-S2M
Description
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer
Cologne Chip AG
Datasheet
HFC-E1
4.4 Register description
4.4.1 Write only registers
138 of 272
R_INC_RES_FIFO [FIFO]
Increment and reset FIFO register
This register is automatically cleared.
Before reading this array register the FIFO must be selected by register R_FIFO.
0
1
2
7..3
Bits
Reset
Value
Name
V_INC_F
V_RES_F
V_RES_LOST
(reserved)
FIFO handling and HDLC controller
(write only)
Data Sheet
Must be ’00000’.
Description
Increment the -counters of the selected FIFO
’0’ = no increment
’1’ = increment
FIFO reset
’0’ = no reset
’1’ = reset selected FIFO ( - and -counters and
channel mask are resetted, but not the
A_CON_HDLC register)
LOST error bit reset
’0’ = no reset
’1’ = reset LOST
March 2003 (rev. A)
Cologne
Chip
0x0E

Related parts for HFC-S2M