HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 237

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

March 2003 (rev. A)
HFC-E1
R_IRQ_CTRL
Interrupt control register
0
2..1
3
4
7..5
Bits
0
0
0
Value
Reset
Name
V_FIFO_IRQ
(reserved)
V_GLOB_IRQ_EN
V_IRQ_POL
(reserved)
Clock, reset, interrupt, timer and watchdog
(write only)
Data Sheet
Description
FIFO interrupt
’0’ = FIFO interrupts disabled
’1’ = FIFO interrupts enabled
Must be ’00’.
Global interrupt signal enable (pin 197)
’0’ = disable
’1’ = enable
Polarity of interrupt signal
’0’ = low active signal
’1’ = high active signal
Must be ’000’.
Cologne
Chip
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