HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 227

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

March 2003 (rev. A)
HFC-E1
R_BRG_CTRL
Access control register for the auxiliary brigde in memory mapped mode
Note: This register is not used in I/O mapped mode.
2..0
4..3
6..5
7
Bits
0
0
0
Value
Reset
V_BRG_CS
V_BRG_ADDR
Name
(reserved)
V_BRG_CS_SRC
Auxiliary interface
(write only)
Data Sheet
Description
Chip select
This bitmap controls the chip select pins.
’000’ = /BRG_CS0
’001’ = /BRG_CS1
. . .
’111’ = /BRG_CS7
High bits of address
Address bits A[10] and A[11] of the auxiliary
bridge (pins BRG_A10 and BRG_A11 ).
Must be ’00’.
Chip select source
’0’ = address bits A[9..7] are used for chip select
CS[2..0]
’1’ = V_BRG_CS is used for chip select, address
bits A[9..7] are used for address selection
Cologne
Chip
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