HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 120

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
(See Table 4.3 on page 132 for suitable V_FIFO_MD and V_FIFO_SZ values.)
120 of 272
R_FIFO_MD
FIFO mode configuration
1..0
2
3
5..4
7..6
Bits
0
0
0
0
Reset
Value
Name
V_FIFO_MD
V_CSM_MD
V_FSM_MD
V_FIFO_SZ
(reserved)
(write only)
Data Sheet
Data flow
FIFO mode
FIFO size
Description
This bitmap and V_FIFO_SZ are used to organize
the FIFOs in the internal or external SRAM.
Channel select mode (CSM)
’0’ = disable CSM (FIFO number = HFC-channel
number)
’1’ = enable CSM
Note: The HFC-E1 works in Simple Mode (SM) if
CSM and FSM are both disabled.
FIFO sequence mode (FSM)
’0’ = disable FSM
’1’ = enable FSM
Note: In most cases where FSM is selected, also
CSM should be enabled.
This bitmap and V_FIFO_MD are used to organize
the FIFOs in the internal or external SRAM. The
actual FIFO sizes depend on the used SRAM size.
Must be ’00’.
March 2003 (rev. A)
Cologne
Chip
0x0D