XC2VP20-6FF1152C Xilinx, Inc., XC2VP20-6FF1152C Datasheet - Page 36

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XC2VP20-6FF1152C

Manufacturer Part Number
XC2VP20-6FF1152C
Description
Pro Platform FPGA
Manufacturer
Xilinx, Inc.
Datasheet

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Functional Description: FPGA
Arithmetic Logic
The arithmetic logic includes an XOR gate that allows a
2-bit full adder to be implemented within a slice. In addition,
36
(First Carry Chain)
LUT
LUT
LUT
LUT
O I
O I
O I
O I
COUT
to S0 of the next CLB
CIN
COUT
CIN
MUXCY
MUXCY
MUXCY
MUXCY
Figure 30: Fast Carry Logic Path
FF
FF
FF
FF
SLICE S1
www.xilinx.com
1-800-255-7778
SLICE S0
a dedicated AND (MULT_AND) gate (shown in
improves the efficiency of multiplier implementation.
LUT
LUT
LUT
LUT
O I
O I
O I
O I
CIN
MUXCY
MUXCY
MUXCY
MUXCY
COUT
to CIN of S2 of the next CLB
CIN
COUT
(Second Carry Chain)
DS083-2 (v1.0) January 31, 2002
Advance Product Specification
FF
FF
FF
FF
SLICE S3
SLICE S2
DS031_07_110200
CLB
Figure
22)
R

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