XC2VP20-6FF1152C Xilinx, Inc., XC2VP20-6FF1152C Datasheet - Page 82

• Manufacturer Part Number: XC2VP20-6FF1152C
• Description: Pro Platform FPGA
• Manufacturer: Xilinx, Inc.

Virtex-II Pro Switching Characteristics
Block SelectRAM Switching Characteristics
Table 37: Block SelectRAM Switching Characteristics
TBUF Switching Characteristics
Table 38: TBUF Switching Characteristics
JTAG Test Access Port Switching Characteristics
Table 39: JTAG Test Access Port Switching Characteristics
82
Notes:
1.
Sequential Delays
Setup and Hold Times Before Clock CLK
Clock CLK
Combinatorial Delays
TMS and TDI Setup times before TCK
TMS and TDI Hold times after TCK
Output delay from clock TCK to output TDO
Maximum TCK clock frequency
Clock CLK to DOUT output
ADDR inputs
DIN inputs
EN input
RST input
WEN input
Minimum Pulse Width, High
Minimum Pulse Width, Low
IN input to OUT output
TRI input to OUT output high-impedance
TRI input to valid data on OUT output
A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed “best-case”, but
if a “0” is listed, there is no positive hold time.
Description
Description
Description
www.xilinx.com
1-800-255-7778
T
T
T
T
T
BWCK
BDCK
BECK
BRCK
BACK
T
T
Symbol
Symbol
Symbol
T
T
T
T
TCKTDO
TCKTAP
T
F
BPWH
T
TAPTK
BPWL
BCKO
T
OFF
TCK
ON
/T
/T
/T
/T
/T
IO
BCKA
BCKD
BCKE
BCKR
BCKW
–8
–8
–8
Speed Grade
Speed Grade
Speed Grade
DS083-3 (v1.0) January 31, 2002
Advance Product Specification
–
–
–
7
7
7
–
–
–
6
6
6
ns, max
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
Units
Units
Units
MHz,
max
R