XC2VP20-6FF1152C Xilinx, Inc., XC2VP20-6FF1152C Datasheet - Page 69

• Manufacturer Part Number: XC2VP20-6FF1152C
• Description: Pro Platform FPGA
• Manufacturer: Xilinx, Inc.

Table 25: Rocket I/O TXUSRCLK Switching Characteristics
DS083-3 (v1.0) January 31, 2002
Advance Product Specification
Setup and Hold Relative to Clock
(TXUSRCLK2)
Clock to Out
Clock
CONFIGENABLE control input
TXBYPASS8B10B control inputs
TXFORCECRCERR control input
TXPOLARITY control input
TXINHIBIT control inputs
LOOPBACK control inputs
TXRESET control input
TXCHARISK control inputs
TXCHARDISPMODE control inputs
TXCHARDISPVAL control inputs
CONFIGIN data input
TXDATA data inputs
TXBUFERR status output
TXKERR status outputs
TXRUNDISP status outputs
CONFIGOUT data output
TXUSRCLK minimum pulse width, High
TXUSRCLK minimum pulse width, Low
TXUSRCLK2 minimum pulse width, High
TXUSRCLK2 minimum pulse width, Low
R
Description
T
T
T
GCCK
GCCK
T
T
T
T
T
T
GDCK
T
T
GCCK
GCCK
GCCK
GCCK
GCCK
GCCK
T
GDCK
GCCK
Virtex-II Pro™ Platform FPGAs: DC and Switching Characteristics
GCCK
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_CFGEN/T
_TCRCE/T
T
1-800-255-7778
_CFGIN/T
T
T
_TCDM/T
GCKDO
_TKCH/T
T
_TCDV/T
_TBYP/T
_TPOL/T
_TRST/T
_TDAT/T
_TINH/T
GCKST
GCKST
GCKST
T
T
_LBK/T
T
T
GPWH
GPWL
Symbol
GPWH
GPWL
_CFGOUT
_TBERR
_TKERR
_TRDIS
_TX2
_TX2
_TX
_TX
GCKC
GCKC
GCKC
GCKC
GCKC
GCKC
GCKC
GCKC
GCKC
GCKC
GCKD
GCKD
_CFGEN
_TBYP
_TCRCE
_TPOL
_TINH
_LBK
_TRST
_TKCH
_TCDM
_TCDV
_CFGIN
_TDAT
-8
Speed Grade
-7
-6
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
Units
69