XC2VP20-6FF1152C Xilinx, Inc., XC2VP20-6FF1152C Datasheet - Page 89

• Manufacturer Part Number: XC2VP20-6FF1152C
• Description: Pro Platform FPGA
• Manufacturer: Xilinx, Inc.

Output Clock Jitter
Table 46: Output Clock Jitter
Output Clock Phase Alignment
Table 47: Output Clock Phase Alignment
DS083-3 (v1.0) January 31, 2002
Advance Product Specification
Notes:
1.
Clock Synthesis Period Jitter
Phase Offset Between CLKIN and CLKFB
Phase Offset Between Any
Duty Cycle Precision
CLK0
CLK90
CLK180
CLK270
CLK2X, CLK2X180
CLKDV (integer division)
CLKDV (non-integer division)
CLKFX, CLKFX180
CLKIN/CLKFB
All CLK outputs
DLL outputs
CLKFX outputs
“DLL outputs” is used here to describe the outputs: CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV.
Description
Description
R
(1)
DCM
CLKIN_CLKFB_PHASE
CLKOUT_PHASE
CLKOUT_DUTY_CYCLE_DLL
CLKOUT_DUTY_CYCLE_FX
CLKOUT_PER_JITT_0
CLKOUT_PER_JITT_90
CLKOUT_PER_JITT_180
CLKOUT_PER_JITT_270
CLKOUT_PER_JITT_2X
CLKOUT_PER_JITT_DV1
CLKOUT_PER_JITT_DV2
CLKOUT_PER_JITT_FX
Outputs
Symbol
Symbol
Virtex-II Pro™ Platform FPGAs: DC and Switching Characteristics
www.xilinx.com
1-800-255-7778
Constraints
Constraints
Min
Min
–8
–8
Max
Max
Speed Grade
Speed Grade
Min
Min
–7
–7
Max
Max
Min
Min
–6
–6
Max
Max
Units
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
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