s908qc16vdse Freescale Semiconductor, Inc, s908qc16vdse Datasheet - Page 108

• Manufacturer Part Number: s908qc16vdse
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Input/Output Ports (PORTS)
11.3.1 Port A Data Register
The port A data register (PTA) contains a data latch for each of the six port A pins.
PTA5–PTA3, PTA1, PTA0 — Port A Data Bits
PTA2 — Port A Data Bit
KBI[5:0] — Port A Keyboard Interrupts
11.3.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is an input or an output. Writing a 1
to a DDRA bit enables the output buffer for the corresponding port A pin; a 0 disables the output buffer.
DDRA[5:0] — Data Direction Register A Bits
108
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
This read-only bit reads the state of the PTA2 pin.
The keyboard interrupt enable bits, KBIE5–KBIE0, in the keyboard interrupt control enable register
(KBIER) enable the port A pins as external interrupt pins (see
(KBI)).
These read/write bits control port A data direction. Reset clears DDRA[5:0], configuring all port A pins
as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
Additional Functions:
Reset:
Read:
Write:
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Reset:
Read:
Write:
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 4
Bit 7
R
R
0
Bit 7
Figure 11-2. Data Direction Register A (DDRA)
R
R
= Reserved
Figure 11-1. Port A Data Register (PTA)
R
6
0
= Reserved
R
6
DDRA5
5
0
PTA5
KBI5
5
DDRA4
NOTE
4
0
Unaffected by reset
PTA4
KBI4
4
= Unimplemented
DDRA3
3
0
= Unimplemented
PTA3
KBI3
3
Chapter 8 Keyboard Interrupt Module
2
0
0
PTA2
KBI2
2
DDRA1
1
0
PTA1
KBI1
1
Freescale Semiconductor
DDRA0
Bit 0
0
PTA0
KBI0
Bit 0