s908qc16vdse Freescale Semiconductor, Inc, s908qc16vdse Datasheet - Page 113

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s908qc16vdse

Manufacturer Part Number
s908qc16vdse
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
11.5.2 Data Direction Register C
Data direction register C (DDRC) determines whether each port C pin is an input or an output. Writing a 1
to a DDRC bit enables the output buffer for the corresponding port C pin; a 0 disables the output buffer.
DDRC[2:0] — Data Direction Register C Bits
When DDRCx is a 1, reading address $0002 reads the PTCx data latch. When DDRCx is a 0, reading
address $0002 reads the voltage level on the pin. The data latch can always be written, regardless of the
state of its data direction bit.
Freescale Semiconductor
These read/write bits control port C data direction. Reset clears DDRC[2:0], configuring all port C pins
as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
Reset:
Read:
Write:
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
port C I/O logic.
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 4
READ DDRC ($0006)
WRITE DDRC ($0006)
WRITE PTC ($0002)
READ PTC ($0002)
Bit 7
0
0
Figure 11-10. Data Direction Register C (DDRC)
= Unimplemented
6
0
0
Figure 11-11
RESET
Figure 11-11. Port C I/O Circuit
5
0
0
does not apply to PTC3.
DDRCx
NOTE
NOTE
PTCx
4
0
0
3
0
0
Figure 11-11
DDRC2
2
0
PTCPUEx
DDRC1
1
0
shows the
PULLUP
DDRC0
Bit 0
PTCx
0
Port C
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