s908qc16vdse Freescale Semiconductor, Inc, s908qc16vdse Datasheet - Page 50

• Manufacturer Part Number: s908qc16vdse
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Analog-to-Digital Converter (ADC10) Module
3.3.4 Sources of Error
Several sources of error exist for ADC conversions. These are discussed in the following sections.
3.3.4.1 Sampling Error
For proper conversions, the input must be sampled long enough to achieve the proper accuracy. Given
the maximum input resistance of approximately 15 kΩ and input capacitance of approximately 10 pF,
sampling to within 1/4
cycles / 2 MHz maximum ADCK frequency) provided the resistance of the external analog source (R
is kept below 10 kΩ. Higher source resistances or higher-accuracy sampling is possible by setting
ADLSMP (to increase the sample window to 23.5 cycles) or decreasing ADCK frequency to increase
sample time.
3.3.4.2 Pin Leakage Error
Leakage on the I/O pins can cause conversion error if the external analog source resistance (R
If this error cannot be tolerated by the application, keep R
1/4
3.3.4.3 Noise-Induced Errors
System noise which occurs during the sample or conversion process can affect the accuracy of the
conversion. The ADC10 accuracy numbers are guaranteed as specified only if the following conditions
are met:
There are some situations where external system activity causes radiated or conducted noise emissions
or excessive V
in wait or I/O activity cannot be halted, the following recommendations may reduce the effect of noise on
the accuracy:
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LSB
There is a 0.1µF low-ESR capacitor from V
There is a 0.1µF low-ESR capacitor from V
If inductive isolation is used from the primary supply, an additional 1µF capacitor is placed from
V
V
The MCU is placed in wait mode immediately after initiating the conversion (next instruction after
write to ADSCR).
There is no I/O switching, input or output, on the MCU during the conversion.
Place a 0.01 µF capacitor on the selected input channel to V
improve noise issues but will affect sample rate based on the external analog source resistance.
Operate the ADC10 in stop mode by setting ACLKEN, selecting the channel in ADSCR, and
executing a STOP instruction. This will reduce V
due to stop recovery.
Average the input by converting the output many times in succession and dividing the sum of the
results. Four samples are required to eliminate the effect of a 1
Reduce the effect of synchronous noise by operating off the asynchronous clock (ACLKEN=1) and
averaging. Noise that is synchronous to the ADCK cannot be averaged out.
leakage error (at 10-bit resolution).
DDA
SSA
and V
to V
DD
SSA
noise is coupled into the ADC10. In these cases, or when the MCU cannot be placed
REFL
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 4
(if available).
LSB
(if available) is connected to V
(at 10-bit resolution) can be achieved within the minimum sample window (3.5
REFH
DDA
DD
SS
to V
to V
AS
noise but will increase effective conversion time
at a quiet point in the ground plane.
SSA
lower than V
REFL
(if available).
(if available).
REFL
LSB
ADVIN
or V
, one-time error.
SSA
/ (4096*I
(if available). This will
Freescale Semiconductor
Leak
) for less than
AS
) is high.
AS
)