s908qc16vdse Freescale Semiconductor, Inc, s908qc16vdse Datasheet - Page 153

• Manufacturer Part Number: s908qc16vdse
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 14
System Integration Module (SIM)
14.1 Introduction
This section describes the system integration module (SIM), which supports up to 24 external and/or
internal interrupts. Together with the central processor unit (CPU), the SIM controls all microcontroller unit
(MCU) activities. A block diagram of the SIM is shown in
that coordinates CPU and exception timing.
The SIM is responsible for:
14.2 RST and IRQ Pins Initialization
RST and IRQ pins come out of reset as PTA3 and PTA2 respectively. RST and IRQ functions can be
activated by programing CONFIG2 accordingly. Refer to
and
14.3 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and peripherals on the MCU. The
system clocks are generated from an incoming clock, BUSCLKX2, as shown in
Freescale Semiconductor
•
•
•
•
CONFIG2).
Bus clock generation and control for CPU and peripherals
–
–
Master reset control, including power-on reset (POR) and computer operating properly (COP)
timeout
Interrupt control:
–
–
–
CPU enable/disable timing
Stop/wait/reset/break entry and recovery
Internal clock control
Acknowledge timing
Arbitration control timing
Vector address generation
Signal Name
Address bus
BUSCLKX4
BUSCLKX2
PORRST
Data bus
IRST
R/W
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 4
Buffered clock from the internal, RC or XTAL oscillator circuit.
The BUSCLKX4 frequency divided by two. This signal is again divided by two
in the SIM to generate the internal bus clocks (bus clock = BUSCLKX4 4).
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
Table 14-1. Signal Name Conventions
Figure
Chapter 4 Configuration Registers (CONFIG1
Description
14-1. The SIM is a system state controller
Figure
14-2.
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