s908qc16vdse Freescale Semiconductor, Inc, s908qc16vdse Datasheet - Page 223

no-image

s908qc16vdse

Manufacturer Part Number
s908qc16vdse
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
18.2.2.3 Break Auxiliary Register
The break auxiliary register (BRKAR) contains a bit that enables software to disable the COP while the
MCU is in a state of break interrupt with monitor mode.
BDCOP — Break Disable COP Bit
18.2.2.4 Break Status Register
The break status register (BSR) contains a flag to indicate that a break caused an exit from wait mode.
This register is only used in emulation mode.
SBSW — SIM Break Stop/Wait
18.2.2.5 Break Flag Control Register
The break control register (BFCR) contains a bit that enables software to clear status bits while the MCU
is in a break state.
Freescale Semiconductor
This read/write bit disables the COP during a break interrupt. Reset clears the BDCOP bit.
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
1 = COP disabled during break interrupt
0 = COP enabled during break interrupt
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 4
BCFE
Bit 7
Bit 7
Bit 7
R
R
R
0
0
0
Figure 18-8. Break Flag Control Register (BFCR)
Figure 18-6. Break Auxiliary Register (BRKAR)
= Unimplemented
= Reserved
= Reserved
Figure 18-7. Break Status Register (BSR)
R
R
6
0
0
6
6
R
R
5
0
0
5
5
R
R
4
0
0
4
4
1. Writing a 0 clears SBSW.
R
R
3
0
0
3
3
R
R
2
0
0
2
2
Note
SBSW
R
1
0
0
1
0
1
(1)
BDCOP
Bit 0
Bit 0
Bit 0
R
R
Break Module (BRK)
0
223

Related parts for s908qc16vdse