mt47h128m16hg-3-it Micron Semiconductor Products, mt47h128m16hg-3-it Datasheet - Page 17

• Manufacturer Part Number: mt47h128m16hg-3-it
• Description: 2gb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Initialization
Figure 8:
COMMAND
ADDRESS
V
DQS
V
DM
V
ODT
DQ
DD
V
CK#
CKE
V
DD
R
CK
TT
REF
DD
TT
Q
L
1
3
4
3
4
4
LVCMOS
LOW LEVEL
High-Z
High-Z
High-Z
Notes appear on page 18
t
DDR2 Power-up and Initialization
VTD
1
T0
2
t CL
SSTL_18
LOW LEVEL
V
clock (CK, CK#)
T = 200µs (MIN)
Power-up:
DD
t CK
and stable
t CL
2
DDR2 SDRAMs must be powered up and initialized in a predefined manner. Operational procedures other than
those specified may result in undefined operation. Figure 8 illustrates the sequence required for power-up and
initialization.
NOP 5
Ta0
T = 400ns
(MIN)
6
A10 = 1
Tb0
PRE
t
RPA
EMR(2)
CODE
Tc0
LM
7
t MRD
CODE
EMR(3)
Td0
LM
8
t MRD
CODE
EMR
Te0
LM
9
t MRD
DLL RESET
MR with
CODE
Tf0
LM
10
t MRD
A10 = 1
PRE
Tg0
200 cycles of CK are required before a READ command can be issued.
11
t
RPA
Th0
REF
12
t RFC
See note 12
REF
Ti0
t RFC
MR without
DLL RESET
CODE
LM
Tj0
13
t MRD
OCD Default
EMR with
CODE
Indicates a break in
time scale
Tk0
LM
14
t MRD
EMR with
OCD Exit
CODE
Tl0
LM
15
t MRD
DON’T CARE
Operation
Normal
VALID
VALID
Tm0
16