mt47h128m16hg-3-it Micron Semiconductor Products, mt47h128m16hg-3-it Datasheet - Page 47

• Manufacturer Part Number: mt47h128m16hg-3-it
• Description: 2gb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Figure 30:
PDF: 09005aef824f87b6/Source: 09005aef824f1182
2gb_ddr2.fm - Rev. A 9/06 EN
DQ8–DQ15 and UDQS, collectively
DQ0–DQ7 and LDQS, collectively
DQ (First data no longer valid) 2
DQ (First data no longer valid) 7
DQ (First data no longer valid) 2
DQ (First data no longer valid) 7
x16 Data Output Timing –
Notes:
DQ (Last data valid) 7
DQ (Last data valid) 2
DQ (Last data valid) 2
DQ (Last data valid) 7
UDQS#
UDQS 1
LDSQ#
LDQS 1
1. DQ transitioning after DQS transitions define the
2. DQ0, DQ1, DQ2, DQ3, DQ4, DQ5, DQ6, or DQ7.
3.
4.
5.
6. The data valid window is derived for each DQS transition and is
7. DQ8, DQ9, DQ10, D11, DQ12, DQ13, DQ14, or DQ15.
CK#
DQ 2
DQ 2
DQ 2
DQ 2
DQ 2
DQ 2
DQ 7
DQ 7
DQ 7
DQ 7
DQ 7
DQ 7
CK
byte, and UDQS defines the upper byte.
t
transitions, and ends with the last valid transition of DQ.
t
t
DQSQ is derived at each DQS clock edge, is not cumulative over time, begins with DQS
QH is derived from
HP is the lesser of
6
6
T1
t HP 5
t
DQSQ,
t HP 5
t
CL or
t
t DQSQ 3
HP:
t QH 4
t DQSQ 3
T2
t QH 4
t
t
t
Data Valid
QH =
QH, and Data Valid Window
CH clock transitions collectively when a bank is active.
Window
T2
T2
Data Valid
T2
t HP 5
Window
47
T2
T2
T2
t
HP -
t DQSQ 3
T2n
t QH 4
t DQSQ 3
t QH 4
Data Valid
t
Window
t HP 5
QHS.
T2n
T2n
T2n
Data Valid
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Window
T2n
T2n
T2n
T3
t DQSQ 3
t QH 4
t DQSQ 3
t QH 4
t HP 5
2Gb: x4, x8, x16 DDR2 SDRAM
Data Valid
Window
t
Data Valid
DQSQ window. LDQS defines the lower
Window
T3
T3
T3
T3
T3n
T3
T3
t DQSQ 3
t DQSQ 3
t HP 5
t QH 4
t QH 4
Data Valid
Window
Data Valid
T4
Window
T3n
T3n
T3n
T3n
T3n
T3n
©2006 Micron Technology, Inc. All rights reserved.
t
QH -
READ Command
t
DQSQ.