mt47h128m16hg-3-it Micron Semiconductor Products, mt47h128m16hg-3-it Datasheet - Page 80

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mt47h128m16hg-3-it

Manufacturer Part Number
mt47h128m16hg-3-it
Description
2gb X4, X8, X16 Ddr2 Sdram
Manufacturer
Micron Semiconductor Products
Datasheet
Figure 64:
Table 16:
PDF: 09005aef824f87b6/Source: 09005aef824f1182
2gb_ddr2.fm - Rev. A 9/06 EN
COMMAND
ODT
ODT
CK#
CKE
RTT
RTT
CK
NOP
T0
DDR2-400/533 ODT Turn-off Timing When Exiting Power-Down Mode
ODT Turn-Off Timing When Exiting Power-Down Mode
Note:
NOP
T1
Parameter
ODT turn-off delay
ODT turn-off
ODT turn-off
(power-down mode)
ODT to power-down exit latency
t CKE (MIN)
The half-clock of
must be derated by the amount of half-clock duty cycle error. For example, if the clock
duty cycle was 47/53,
0.03, or 2.53, for
NOP
T2
Transitioning R
NOP
T3
t AXPD (MIN)
TT
t
AOF (MAX).
t
AOFD’s 2.5
NOP
T4
t
AOFD would actually be 2.5 - 0.03, or 2.47, for
R
80
TT
t
Unknown
CK assumes a 50/50 clock duty cycle. This half-clock value
NOP
Ta0
Symbol
t
t
AOFPD
t
AOFD
t
AXPD
AOF
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t AOFPD (MIN)
NOP
Ta1
t AOFPD (MAX)
R
t
AC (MIN) +
TT
t
2Gb: x4, x8, x16 DDR2 SDRAM
AC (MIN)
On
2,000
Min
2.5
8
NOP
t AOF (MIN)
Ta2
t AOFD
DON’T CARE
NOP
t
Ta3
AC (MAX) + 600
2.5 ×
(MAX) + 1,000
©2006 Micron Technology, Inc. All rights reserved.
Max
t
2.5
CK +
t
AOF (MIN) and 2.5 +
NOP
Ta4
t
ODT Timing
AC
t AOF (MAX)
Indicates a break in
time scale
NOP
Ta5
Units
t
t
ps
ps
CK
CK

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