gwixp425bdt Intel Corporation, gwixp425bdt Datasheet - Page 125
gwixp425bdt
Manufacturer Part Number
gwixp425bdt
Description
Intel Xp42x Product Line Of Network Processors And Ixc1100 Control Plane Processor
Manufacturer
Intel Corporation
Datasheet
1.GWIXP425BDT.pdf
(134 pages)
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5.5.2.7.1
5.5.2.8
Figure 41.
Datasheet
EX_IOWAIT_N
The EX_IOWAIT_N signal is available to be shared by devices attached to Chip Selects 0 through
7 and is used as required by slow devices.
If the external device asserts EX_IOWAIT_N during the strobe phase of a read transfer, the
controller will hold in that phase until the EX_IOWAIT_N goes false. At that time, the controller
will immediately transition to the hold phase regardless of the setting of the programming
parameter (T3) for the strobe phase.
The EX_IOWAIT_N signal only affects the interface during the strobe phase of a read transfer. If
Chip Selects 4 through 7 are configured in HPI mode of operation, each chip select will have a
corresponding HRDY signal called EX_RDY. The polarity of the ready signal is programmable.
Chip Select 4 corresponds to EX_RDY signal 0 and Chip Select 7 corresponds to EX_RDY signal
3.
High-Speed, Serial Interfaces
High-Speed, Serial Timings
Intel
hss_(tx or rx)frame
hss_(tx or rx)frame
hss_(tx or rx)frame
hss_(tx or rx)frame
®
(Negative edge)
(Negative edge)
(Negative edge)
(Negative edge)
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
(Positive edge)
(Positive edge)
(Positive edge)
(Positive edge)
As Outputs:
hss_ rxdata
hss_ rxdata
hss_ txdata
hss_ txdata
As Inputs:
hss_rxclk
hss_txclk/
Document Number: 252479, Revision: 005
1
T5
T1
T6
Valid Data
Valid Data
T3
T7
Valid Data
Valid Data
T2
T4
T8
T9
March 2005
A9594-01
125
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