gwixp425bdt Intel Corporation, gwixp425bdt Datasheet - Page 37

• Manufacturer Part Number: gwixp425bdt
• Description: Intel Xp42x Product Line Of Network Processors And Ixc1100 Control Plane Processor
• Manufacturer: Intel Corporation

Table 7.
Datasheet
PCI Controller (Sheet 2 of 2)
PCI_DEVSEL_N
PCI_IDSEL
PCI_REQ_N[3:1]
PCI_REQ_N[0]
PCI_GNT_N[3:1]
PCI_GNT_N[0]
PCI_INTA_N
PCI_CLKIN
1.
2.
†
Intel
Name
®
While PWRON_RESET_N is deasserted use Power On Reset column for the pin state.
After deassertion of PWRON_RESET_N, and deassertion of RESET_IN_N, and assertion of
PLL_LOCK, all signals reflect the value shown in the RESET column.
For a legend of the Type codes, see
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Document Number: 252479, Revision: 005
Power
Reset
on
Z
Z
Z
Z
Z
Z
Z
Z
1
Reset
VI
Z
Z
Z
Z
Z
Z
Z
2
Type
O/D
I/O
I/O
I/O
O
I
I
I
†
Table 5 on page
PCI Device Select:
Should be pulled high with a 10-K: resistor when not being
utilized in the system.
PCI Initialization Device Select is a chip select during
configuration reads and writes.
Should be pulled high with a 10-K: resistor when not being
utilized in the system.
PCI arbitration request: Used by the internal PCI arbiter to allow
an agent to request the PCI bus.
Should be pulled high with a 10-K: resistor when not being
utilized in the system.
PCI arbitration request:
Should be pulled high with a 10-K: resistor, when the PCI bus is
not being utilized in the system.
PCI arbitration grant: Generated by the internal PCI arbiter to
allow an agent to claim control of the PCI bus.
PCI arbitration grant:
Should be pulled high with a 10-K: resistor when not being
utilized in the system.
PCI interrupt: Used to request an interrupt.
Should be pulled high with a 10-K: resistor when not being
utilized in the system.
PCI Clock: provides timing for all transactions on PCI. All PCI
signals — except INTA#, INTB#, INTC#, and INTD# — are
sampled on the rising edge of CLK and timing parameters are
defined with respect to this edge. The PCI clock rate can operate
at up to 66 MHz.
Should be pulled low with a 10-K: resistor when not being
utilized in the system.
• When used as an output, PCI_DEVSEL_N indicates that
• When used as an input, PCI_DEVSEL_N indicates if any
• When configured as an input (PCI arbiter enabled), the
• When configured as an output (PCI arbiter disabled), the pin
• When configured as an output (PCI arbiter enabled), the
• When configured as an input (PCI arbiter disabled), the pin
device has decoded that address as the target of the
requested transaction.
device on the PCI bus exists with the given address.
internal PCI arbiter will allow an agent to request the PCI
bus.
will be used to request access to the PCI bus from an
external arbiter.
internal PCI arbiter to allow an agent to claim control of the
PCI bus.
will be used to claim access of the PCI bus from an external
arbiter.
33.
Description
March 2005
37