gwixp425bdt Intel Corporation, gwixp425bdt Datasheet - Page 35
gwixp425bdt
Manufacturer Part Number
gwixp425bdt
Description
Intel Xp42x Product Line Of Network Processors And Ixc1100 Control Plane Processor
Manufacturer
Intel Corporation
Datasheet
1.GWIXP425BDT.pdf
(134 pages)
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Table 6.
Datasheet
SDRAM Interface (Sheet 2 of 2)
SDM_CKE
SDM_DQM[3:0]
1.
2.
†
Intel
Name
®
While PWRON_RESET_N is deasserted use Power On Reset column for the pin state.
After deassertion of PWRON_RESET_N, and deassertion of RESET_IN_N, and assertion of
PLL_LOCK, all signals reflect the value shown in the RESET column.
For a legend of the Type codes, see
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Document Number: 252479, Revision: 005
Reset
Power
on
Z
Z
1
Reset
1
0
2
Type
O
O
†
Table 5 on page
SDRAM Clock Enable: CKE is driving high to activate the
clock to an external SDRAM and driven low to de-activate the
CLK to an external SDRAM.
SDRAM Data bus mask: DQM is used to byte select data
during read/write access to an external SDRAM.
33.
Description
March 2005
35
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