LPC47N237-MD SMSC [SMSC Corporation], LPC47N237-MD Datasheet - Page 68
LPC47N237-MD
Manufacturer Part Number
LPC47N237-MD
Description
3.3V I/O CONTROLLER FOR PORT REPLICATORS AND DOCKING STATIONS
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47N237-MD.pdf
(138 pages)
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Chapter 11 Serial IRQ
11.1
Note:
Note 1:
Note:
Note 1:
Note 2:
Note 3:
Revision 0.3 (10-26-04)
PCI_CLK
SER_IRQ
PCI_CLK
SER_IRQ
Drive Source
Driver
The LPC47N237 supports the serial interrupt to transmit interrupt information to the host system. The
serial interrupt scheme adheres to the Serial IRQ Specification for PCI Systems, Version 6.0.
PCI_CLK, SER_IRQ and nCLKRUN pins are used for this interface. The Serial IRQ/CLKRUN Enable bit
D7 in CR29 activates the serial interrupt interface.
Timing Diagrams For SER_IRQ Cycle
H=Host Control; R=Recovery; T=Turn-Around; SL=Slave Control; S=Sample
Start Frame pulse can be 4-8 clocks wide depending on the location of the device in the PCI bridge
hierarchy in a synchronous bridge design.
H=Host Control; R=Recovery; T=Turn-Around; S=Sample; I=Idle
Stop pulse is 2 clocks wide for Quiet mode, 3 clocks wide for Continuous mode.
There may be none, one or more Idle states during the Stop Frame.
The next SER_IRQ cycle’s Start Frame pulse may or may not start immediately after the turn-around clock
of the Stop Frame.
Figure 11.2 B. Stop Frame Timing with Host using 17 SER_IRQ sampling period
Figure 11.1 A. Start Frame timing with source sampled a low pulse on IRQ1
S
FRAME
None
IRQ14
R
IRQ
SL
or
H
T
START
S
Host Controller
START FRAME
IRQ15
H
IRQ15
FRAME
R
1
DATASHEET
T
R
S
IOCHCK#
None
FRAME
Page 68
T
R
IRQ0 FRAME IRQ1 FRAME
T
S
None
I
R
2
3.3v I/O Controller for Port Replicators and Docking Stations
STOP FRAME
Host Controller
T
STOP
H
S
IRQ1
1
R
R
T
T
NEXT CYCLE
IRQ2 FRAME
S
None
SMSC DS – LPC47N237
START
R
T
3
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