LPC47N237-MD SMSC [SMSC Corporation], LPC47N237-MD Datasheet - Page 80

• Manufacturer Part Number: LPC47N237-MD
• Description: 3.3V I/O CONTROLLER FOR PORT REPLICATORS AND DOCKING STATIONS
• Manufacturer: SMSC [SMSC Corporation]

Field: Start
Bits:
15.1.2 Bus Protocols
15.1.3 Slave Address
Revision 0.3 (10-26-04)
1
SMB_A0
SCLK
SDAT
nSMBINT
SCLK_1
SDAT_1
SCLK_2
SDAT_2
PIN NAME
Field: Start
Typical Write Byte, Read Byte protocols are shown below. Register accesses are performed using 7-bit
slave addressing, an 8-bit register address field, and an 8-bit data field.
LPC47N237 driving data on the SDAT line; otherwise host data is on the SDAT line.
The slave address is the unique SMBus Interface Address for the LPC47N237 that identifies it on SMBus.
The register address field is the internal address of the register to be accessed. The register data field is
the data that the host is attempting to write to the register or the contents of the register that the host is
attempting to read.
Data bytes are transferred MSB first.
When using the LPC47N237 SMBus Interface, a read and write will always consist of the SMBus Interface
Address byte, followed by the Register Address byte, then the data byte.
Write Byte
The Write Byte protocol is used to write data to the registers. The data will only be written if the protocol
shown in Table 15.2 is performed correctly. Only one byte is transferred at time for a Write Byte protocol.
Read Byte
The Read Byte protocol is used to read data from the registers. The data will only be read if the protocol
shown in Table 15.3 is performed correctly. Only one byte is transferred at time for a Read Byte protocol.
The slave address is the unique address for the LPC47N237 that identifies the device on SMBus.
Bits:
Slave Addr
7
1
Slave Addr
Wr
1
TYPE
IOD
IOD
IOD
IOD
IOD
IOD
OD
I
7
Ack
1
Table 15.2 − SMBus Write Byte Protocol
Table 15.3 − SMBus Read Byte Protocol
Reg. Addr Ack
PWR WELL
Wr
1
8
VTR
VTR
VTR
VTR
VTR
VTR
VTR
VTR
DATASHEET
Table 15.1 – SMBus Pins
Ack
1
1
Page 80
Reg. Addr
SMBus LSB address pin with
SMBus Clock IOD
SMBus Data IOD
Active low SMBus Interrupt Open-Drain output
SMBus Clock IOD
SMBus Data IOD
SMBus Clock IOD
SMBus Data IOD
Start
1
8
Slave Addr
3.3v I/O Controller for Port Replicators and Docking Stations
Ack
7
1
DESCRIPTION
Reg. Data
Rd
1
8
Ack
1
The shading indicates the
Ack
Reg. Data
1
SMSC DS – LPC47N237
8
Stop
1
Nack
1
Stop
1