LPC47N237-MD SMSC [SMSC Corporation], LPC47N237-MD Datasheet - Page 79

• Manufacturer Part Number: LPC47N237-MD
• Description: 3.3V I/O CONTROLLER FOR PORT REPLICATORS AND DOCKING STATIONS
• Manufacturer: SMSC [SMSC Corporation]

3.3v I/O Controller for Port Replicators and Docking Stations
Chapter 15 SMBus GPIO Block
15.1
15.1.1 SMBus Pins
SMSC DS – LPC47N237
SMBus Isolation Circuitry controls the connection of up to two devices to the SMBus. Two pairs of SMBus
pins (SCLK_1/SDAT_1, SCLK_2/SDAT_2) are individually software selectable to connect internally to the
SCLK and SDAT pins.
See the sub sections below for description on SMBus Slave Controller and the SMBus Controlled GPIO
Block.
SMBus Slave Controller
The host processor communicates with the LPC47N237 through a series of read/write registers via the
SMBus interface. SMBus is a serial communication protocol between a computer host and its peripheral
devices.
The default power on SMBus address is 010010x binary, where x reflects the state defined by the SMB_A0
pin.
The LPC47N237 SMBus implementation is a subset of the SMBus interface to the host. The SMBus
Controller Block is a slave-only SMBus device. The implementation in the LPC47N237 is a subset of
SMBus since it only supports two protocols.
The Read Byte and Write Byte protocols are the only valid SMBus protocols for the LPC47N237. The part
responds to other protocols as described in the “Invalid Protocol Response Behavior” Section. Reference
the System Management Bus Specification, Rev 1.1.
The SMBus interface is used to read and write the registers in the LPC47N237. The only valid registers for
a read or write protocol are the registers shown in the “SMBus GPIO Register”.
Table 15.1 shows the SMBus pins.
The SMBus GPIO block is a standalone block and consists into two blocks:
The SMBus GPIOs will be accessed via the SMBus interface. There will be no LPC Host access to
the GPIOs in the SMBus GPIO Block.
The SMBus controller and the GPIO block is powered by VTR.
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SMBus Slave Controller
SMBus Controlled GPIO Block
DATASHEET
Page 79
Revision 0.3 (10-26-04)