LPC47N237-MD SMSC [SMSC Corporation], LPC47N237-MD Datasheet - Page 83
LPC47N237-MD
Manufacturer Part Number
LPC47N237-MD
Description
3.3V I/O CONTROLLER FOR PORT REPLICATORS AND DOCKING STATIONS
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47N237-MD.pdf
(138 pages)
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3.3v I/O Controller for Port Replicators and Docking Stations
15.3
SMSC DS – LPC47N237
The following gives some sample values of pull-up resistor values to the following voltages: V0=5V,
V1=3.3V, V2=5V (refer to the figure above).
The estimated max capacitance is 35pf into the SDAT/SCLK pins and 30pF into the SDAT_1,2/SCLK_1,2
pins.
SMBus Controlled GPIOs
SMBus GPIO summary:
32 GPIO pins
Pins and Registers Powered by VTR. All SMBus GPIOs can drive under VTR power.
Wake on Change – set the status bit on both a high-to-low and a low-to-high edge. Assert nSMBINT
pin if associated mask bit is set.
NOTE: The switch is implemented as an n-channel switch that will not pass a full voltage swing.
It provides a current path to ground.
The board designer should treat each signal pair to the switch as a separate bus with a resistance
in the path.
The maximum resistance of the switch between any bus to any other bus is 25ohms.
The design requires pull-ups on each of the three busses shown above. The resistor values should
be selected so that the total max current for all three busses does not exceed 2mA.
Other peripheral devices on the bus must have sufficient current sinking capability to ensure that
the V
SMBus
Master/
R0
R1
R2
Slave
OL
meets system requirements.
R0
V0
R0
Figure 15.1 – SMBus Isolation Switch
SMBus
Slave
Total Current for all
three busses =2mA max
7k
6k
9k
DATASHEET
SMSC
Page 83
Switch
Select Bits
NOTE
NOTE
Total Current for all three
busses = 350uA max
35k
25k
45k
R1
R2
R2
V1
R1
V2
D1
D2
Revision 0.3 (10-26-04)
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