UPD17073 NEC, UPD17073 Datasheet - Page 119

• Manufacturer Part Number: UPD17073
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
• Manufacturer: NEC

14.7.3 Wait operation and note
operation), and the wait released status continues until eight clocks are counted.
and presettable shift register.
shift clock pin is high, the correct data is not set.
content of the MSB of the data is output to the serial data output pin when the “PUT” instruction is executed.
to the SIOTS flag.
14.7.4 Interrupt request issuance timing
14.7.5 Shift clock generation timing
(1) When wait status is released from initial status
When the wait status has been released, serial data is output at the next falling edge of the clock (transmission
After the eight clocks have been output, make the shift clock pin high and stop the operations of the clock counter
Note that, if data is written to or read from the presettable shift register while the wait status is released and the
If data is written to the presettable shift register while the wait status is released and the shift clock pin is low, the
If the forced wait status is set while the wait status is released, the wait status is immediately set when “0” is written
An interrupt request is issued when eight clocks have been transmitted (received).
The “initial status” means the point at which the P0B2/SCK pin has been made high with the internal clock
operation selected.
During the wait status, a high level is output to the shift clock pin.
The wait status can be released and a clock can be selected at the same time.
PD17072,17073
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