UPD17073 NEC, UPD17073 Datasheet - Page 179

• Manufacturer Part Number: UPD17073
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
• Manufacturer: NEC

19.3.4 Releasing clock stop status by power-ON reset
Note
Figure 19-4 illustrates how the clock stop status is released by power-ON reset.
When the clock stop status is released by power-ON reset, the power failure detection circuit operates.
This voltage is called power-ON clear voltage. The maximum value of the power-ON clear voltage is 1.8
V, and the actual value is in a range not exceeding this maximum value. For details, refer to 20.4.1 Power-
ON clear voltage.
V
CE pin
X
CE pin
X
V
DD
OUT
OUT
DD
V
CE pin
X
CE pin
X
V
DD
OUT
DD
OUT
pin
pin
pin
pin
3 V
0 V
3 V
0 V
H
H
H
H
L
L
L
L
3 V
0 V
3 V
0 V
H
H
H
H
L
L
L
L
If the clock stop instruction is not used, the operation is performed as follows:
Figure 19-4. Releasing Clock Stop by Power-ON Reset
1.8 V
1.8 V
If the clock stop instruction is not used, the operation is performed as follows:
Figure 19-3. Releasing Clock Stop by CE Reset
Note
Note
STOP s instruction
STOP s instruction
Oscillation stops
Program starts from address 0 (CE reset)
Program starts from address 0 (CE reset)
125 ms
or more
0
CE reset is effected in synchronization
with next setting of basic timer 0 carry
FF after CE pin goes high
-t
125 ms
125 ms
or more
or more
SET
Program starts from
address 0 (power-ON reset)
Program starts from
address 0 (power-ON reset)
PD17072,17073
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