UPD17073 NEC, UPD17073 Datasheet - Page 140

• Manufacturer Part Number: UPD17073
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
• Manufacturer: NEC

15.6 Use of PLL Frequency Synthesizer
HF, or VHF).
15.6.1 Direct Division Mode (MF)
140
(1) Division mode
(2) Pin to be used
(3) Reference frequency : f
(4) Division value
(1) Selecting division mode
(2) Pin to be used
(3) Setting of reference frequency f
(4) Calculating division value N
(5) Example of PLL data setting
To control the PLL frequency synthesizer, the following data are necessary:
The following paragraphs 15.6.1 through 15.6.3 describe how to set the above data in each division mode (MF,
Then set the PLL data register, PLL mode select register, and PLL reference frequency select register as follows:
Select the direct division mode by the PLL mode select register.
The VCOL pin is enabled when the direct division mode is selected.
Set the reference frequency by using the PLL reference frequency select register.
Calculate as follows:
where,
Suppose that broadcasting in the following MW band is to be received:
The division value N is:
N =
Receive frequency
Reference frequency
Intermediate frequency
N =
0
0
f
f
f
VCOL
VCOL
r
2
f
f
r
VCOL
1
f
r
: input frequency of VCOL pin
: reference frequency
0
=
0
: direct division (MF) or pulse swallow (HF, VHF)
: VCOL or VCOH
: N
1422 + 450
1
r
7
1
PLL data register
3
1
: 1422 kHz (MW band)
:
: +450 kHz
0
r
3 kHz
= 624 (decimal)
= 270H (hexadecimal)
0
0
0
0
don’t care
0
PLL mode
select
register
0
MF
0
1
PLL reference
frequency
select register
0
3 kHz
0
0
PD17072,17073
1