UPD17073 NEC, UPD17073 Datasheet - Page 39

• Manufacturer Part Number: UPD17073
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
• Manufacturer: NEC

6.2 Address Creation of General Register with Each Instruction
instruction is executed.
6.2.1 Addition (“ADD r, m”, “ADDC r, m”),
specifies only the column address.
6.2.2 Indirect transfer (“MOV @r, m”, “MOV m, @r”) instructions
address specified by “@R”.
6.3 Notes on Using General Register
memory must be treated as data memory instead of as the general register.
The following paragraphs 6.2.1 and 6.2.2 describe how the address of the general register is created when each
For details of the operation of each instruction, refer to 7. ALU (Arithmetic Logic Unit) BLOCK.
Table 6-1 shows the address of general register “R” specified by an instruction operand “r”. The operand “r”
Table 6-2 shows the address of the general register “R” specified by instruction operand “r”, and the indirect transfer
There is no instruction available that performs an operation between the general register and immediate data.
To perform an operation between the data memory specified as the general register and immediate data, the data
subtraction (“SUB r, m”, “SUBC r, m”),
logical operation (“AND r, m”, “OR r, m”, “XOR r, m”),
direct transfer (“LD r, m”, “ST m, r”),
rotate processing (“RORC r”) instructions
General register address
General register address
Indirect transfer address
Table 6-1. Address Creation of General Register
Table 6-2. Address Creation of General Register
@R
R
R
b
b
3
3
Fixed to 0
Fixed to 0
Fixed to 0
b
b
Bank
Bank
2
2
b
b
1
1
b
b
0
0
Row address Column address
Row address Column address
b
b
Fixed to 0
Fixed to 0
Fixed to 1
2
2
b
b
1
1
b
b
0
0
b
b
3
3
Contents of R
b
b
2
2
PD17072,17073
r
r
b
b
1
1
b
b
0
0
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